Diamond Foundry grows first 200mm single-crystal diamond wafer for AI chips

Diamond Foundry has grown a single-crystal diamond 200 mm across — the first anyone has managed at that size. The San Francisco company showed it off on November 5-6, 2026, at the CarbonSemi 2026 conference in Ningbo, China. The crystal, branded D200mm, is twice as wide as the 100 mm wafer the company unveiled in November 2023.

This has nothing to do with engagement rings. Diamond Foundry wants the material sitting underneath AI chips, pulling heat away from processors that keep running hotter. Diamond's thermal conductivity lands at roughly 2,000 W/mK — about five times copper's, the metal most people picture when they think of moving heat out of electronics.

The operative phrase is single-crystal. D200mm is one continuous crystal structure, unlike polycrystalline diamond, which fuses many smaller crystals together. Grain boundaries in that fused material can interfere with heat flow and electrical behavior, and that continuity is what makes the crystal a candidate semiconductor substrate.

The size is strategy, too. At 200 mm, the wafer matches industry-standard chip-production dimensions, so it could in principle slot into existing manufacturing workflows instead of demanding custom tooling. Diamond Foundry pitches two uses: cooling high-power processors, and enabling smaller power electronics that shed heat well enough to shrink.

The company frames D200mm as 25 years of scientific R&D paying off, accelerated by its 2022 acquisition of Audiatec, a German diamond technology firm that brought extra expertise. It's also reported to be building a $2.77 billion large-scale production facility in Spain, a project tied to the EU Chips Act — a signal Diamond Foundry sees itself in the chip supply chain, not the luxury goods business.

Proof of scale isn't proof of production, though. The crystal on display is still unpolished, and a raw crystal and a fab-ready wafer are two very different things. Diamond Foundry hasn't disclosed yield, defect density, or how the material performs with commercial semiconductor processes. Watch three things: polished wafers, published defect and yield data, and any chipmaker willing to test the substrate in real hardware.